Diode junction poly fuse

ABSTRACT

System and method for providing an electrical fuse having a p-n junction diode. A preferred embodiment comprises a cathode, an anode, and one or more links formed between the cathode and the anode. The cathode and the portion of the cathode adjoining the link are doped with a first impurity, preferably a p-type impurity. The anode and the portion of the link adjoining the anode are doped with a second impurity, preferably an n-type impurity. The junction of the first impurity and the second impurity in the link forms a p-n junction diode. A conductive layer, such as a silicide layer, is formed over the p-n junction diodes. In an alternative embodiment, a plurality of p-n junction diodes may be formed in each link. One or more contacts may be formed to provide electrical contact to the cathode and the anode.

TECHNICAL FIELD

The present invention relates generally to a system and method for anelectrical fuse, and more particularly to a system and method for anelectrical fuse for use in semiconductor devices.

BACKGROUND

Fuses are commonly used in integrated circuits to provide redundancy andprogramming capabilities. To increase yield in integrated circuits suchas memory chips, it is common to include redundant memory cells on thememory chips. If a memory circuit is found to be defective or is notneeded, the fuse may be blown thereby activating or deactivating theredundant memory cells. Another common practice is to utilize fuses toprogram or customize integrated circuits for a particular application orcustomer. In this manner, the same chip may be produced and customizedfor individual customers by programming the fuses after fabrication,thereby reducing the fabrication costs.

Typically, fuses comprise a conductive link that may be blown orruptured to prevent current from flowing. In one particular type offuse, the conductive link is formed of a metal, such as aluminum orcopper, and blown by a laser. The use of the laser, however, requirescomplicated processing steps and expensive laser equipment.

Another type of fuse involves the use of an electrical fuse, which maybe blown by passing an electrical current of sufficient magnitudethrough the selected fuses for a sufficient period of time to alter theelectrical properties of the link, generally increasing the resistanceof the link. A common design for such a fuse comprises a cathode and ananode interconnected by a thinner fuse link. Such a structure iscommonly formed of doped polysilicon or undoped/doped polysilicon havinga silicided surface.

To blow the fuse, a sufficiently high current is applied to the linkcausing high current concentrations or “current crowding” where thedimensions of the fuse are reduced in the link. The current crowdingcauses silicide agglomeration or melting of the link, increasing theresistance of the link. A sensing circuit is then able to sense theamount of resistance to determine the state of the fuse.

In an attempt to reduce the amount of current and the time periodrequired to blow the fuse, further attempts have incorporated a p-njunction diode in conjunction with the silicided layer. In a typicaldesign, the cathode, anode, and fuse link are formed of a polysiliconmaterial. The cathode of the fuse is doped with p-type impurities, andthe fuse link and the anode are doped with n-type impurities. Thejunction of the p-type cathode and the n-type fuse link forms a p-njunction diode. The surface of the polysilicon at the p-n junction diodeis silicided.

To blow the fuse, the cathode is negatively biased and the anode ispositively biased causing a reverse bias to be applied to the p-njunction diode. Because the p-n junction diode does not allow thecurrent to flow in this configuration, the current flows through thesilicided layer. The current crowding in the silicide layer over the p-njunction causes silicide migration or melting of the link, therebyblowing the fuse. Thereafter, the link is a high-resistance path andallows sensing circuits to detect the blown state of the fuse.

SUMMARY OF THE INVENTION

These and other problems are generally solved or circumvented, andtechnical advantages are generally achieved, by preferred embodiments ofthe present invention in which an electrical fuse having a p-n junctiondiode is provided.

In accordance with a preferred apparatus embodiment of the presentinvention, an electrical fuse comprises a cathode, an anode, and one ormore links electrically coupling the cathode to the anode, wherein eachlink has a first portion and a second portion. The cathode and the firstportion are doped with a first impurity, and the anode and the secondportion are doped with a second impurity. Preferably, the first impurityis a p-type impurity, and the second impurity is an n-type impurity. Oneor more p-n junction diodes are formed in the link at the junctions ofportions of the link doped with the first impurity type and portions ofthe link doped with the second impurity type. A conductive layer, suchas a silicide, is formed over the p-n junction diodes. One or morecontacts may be formed to provide an electrical connection to the anodeand the cathode.

In accordance with a preferred method embodiment of the presentinvention, a method for forming an electrical fuse is provided. The fuseis formed, preferably from polysilicon, having a cathode, an anode, andone or more links electrically coupling the cathode to the anode,wherein each link has a first portion and a second portion. A firstdoping process is performed to dope the cathode and the first portion ofthe links with a first impurity type. A second doping process isperformed to dope the anode and the second portion of the links with asecond impurity type. One or more p-n junction diodes are formed in thelink at the junctions of portions of the link doped with the firstimpurity type and portions of the link doped with the second impuritytype. A conductive layer, such as a silicide, is formed over the p-njunctions, and one or more contacts may be formed to provide anelectrical connection to the anode and the cathode.

The foregoing has outlined rather broadly the features and technicaladvantages of the present invention in order that the detaileddescription of the invention that follows may be better understood.Additional features and advantages of the invention will be describedhereinafter which form the subject of the claims of the invention. Itshould be appreciated by those skilled in the art that the conceptionand specific embodiment disclosed may be readily utilized as a basis formodifying or designing other structures or processes for carrying outthe same purposes of the present invention. It should also be realizedby those skilled in the art that such equivalent constructions do notdepart from the spirit and scope of the invention as set forth in theappended claims.

BRIEF DESCRIPTION OF THE DRAWINGS

For a more complete understanding of the present invention, and theadvantages thereof, reference is now made to the following descriptionstaken in conjunction with the accompanying drawings, in which:

FIGS. 1 a-5 b are plan views and cross section views after variousprocess steps are performed to fabricate an electrical fuse having a p-njunction diode in accordance with one embodiment of the presentinvention;

FIG. 6 is a schematic of an electrical circuit corresponding to a fusefabricated in accordance with FIGS. 1 a-5 b prior to programming;

FIG. 7 is a schematic of an electrical circuit corresponding to a fusefabricated in accordance with FIGS. 1 a-5 b after programming;

FIG. 8 is a plan view of an electrical fuse having a plurality of links,each link having a p-n junction diode, in accordance with one embodimentof the present invention;

FIG. 9 is a schematic corresponding to the electrical fuse of FIG. 8 inaccordance with one embodiment of the present invention;

FIG. 10 is a plan view of an electrical fuse with a single link having aplurality of p-n junction diodes in accordance with one embodiment ofthe present invention;

FIG. 11 is a schematic corresponding to the electrical fuse of FIG. 10in accordance with one embodiment of the present invention;

FIG. 12 is a plan view of an electrical fuse having a plurality oflinks, each link a plurality of p-n junction diodes, in accordance withone embodiment of the present n;

FIG. 13 is a schematic corresponding to the electrical fuse of FIG. 12in nce with one embodiment of the present invention; and

FIG. 14 is a plan view of a cathode/anode showing an array of contactsin nce with one embodiment of the present invention.

DETAILED DESCRIPTION OF ILLUSTRATIVE EMBODIMENTS

The making and using of the presently preferred embodiments arediscussed in detail below. It should be appreciated, however, that thepresent invention provides many applicable inventive concepts that canbe embodied in a wide variety of specific contexts. The specificembodiments discussed are merely illustrative of specific ways to makeand use the invention, and do not limit the scope of the invention.

The present invention will be described with respect to preferredembodiments in a specific context, namely an electrical fuse having oneor more links, each link having one or more p-n junction diodes. Thecathode and anode are symmetrical and approximately the same size, andthe links are straight. The present invention, however, may also beapplied to other fuse structures having varying shapes, sizes, andconfigurations.

FIGS. 1 a-5 b illustrate a method for forming a single-link fusestructure in accordance with one embodiment of the present invention.The method begins in FIGS. 1 a-1 b, wherein FIG. 1 a is a plan view of awafer 100, and FIG. 1 b is a cross section view of wafer 100 along theaxis indicated in FIG. 1 a. Wafer 100 includes a substrate 110 having apolysilicon layer 112 formed thereon. The substrate 110 is preferably asilicon substrate, which is typically undoped, but may be lightly doped.Other materials, such as germanium, quartz, sapphire, and glass couldalternatively be used for the substrate 110. In addition, the substrate110 could be a semiconductor-on-insulator (SOI) wafer. The polysiliconlayer 112 is preferably deposited using low-pressure chemical vapordeposition (LPCVD) or CVD techniques to a thickness less than about 2500Å.

FIGS. 2 a and 2 b illustrate the wafer 100 of FIGS. 1 a-1 b after thepolysilicon layer 112 (FIGS. 1 a-1 b) has been patterned to form acathode 120, an anode 122, and a link 124 between the cathode 120 andthe anode 122. FIG. 2 a is a plan view, and FIG. 2 b is a cross sectionview along the axis indicated in FIG. 2 a. The polysilicon layer 112(FIGS. 1 a-1 b) may be patterned, for example, by using standardphotolithography techniques known in the art. Generally,photolithography techniques involve depositing a photoresist material(not shown), which is masked, exposed, and developed to expose portionsof the polysilicon layer 112. The remaining photoresist materialprotects the underlying material from subsequent processing steps, suchas etching. In the preferred embodiment, photoresist material ispatterned to define the shape of a fuse as illustrated in FIG. 2 a.

After the photoresist material has been applied and patterned, anetching process such as a wet or dry, anisotropic or isotropic etchprocess, but preferably an anisotropic dry etch process, is performed toform the cathode 120, anode 122, and link 124. Generally, the cathode120 and the anode 122 are wider areas interconnected with a narrowerlink 124. Preferably, the cathode 120 and the anode 122 are symmetrical.

The size and the shape of the cathode 120, the anode 122, and the link124 may also vary. In the preferred embodiment illustrated in FIG. 2 a,the cathode 120, the anode 122, and the link 124 are rectangular shaped.In other embodiments, any or all of the cathode 120, the anode 122, andthe link 124 may have varying shapes and differing sizes. For example,the link 124 may be jagged, curved, extended, shortened, or the like.Additionally, the cathode 120 and the anode 122 may be oval-shaped,circular, smaller, larger, symmetrical, asymmetrical, differing sizes,or the like.

FIGS. 3 a-3 b illustrate the wafer 100 of FIGS. 2 a-2 b after the anode122 and a portion of the link 124 have been doped, wherein FIG. 3 a is aplan view and FIG. 3 b is a cross section view along the axis indicatedin FIG. 3 a. The anode 122 is preferably doped with an n-type impurity,such as phosphorous, nitrogen, arsenic, antimony, or the like, at a doseof about 1E13 to about 5E15 atoms/cm² and at an energy of about 1 toabout 20 KeV. The doping levels may be altered to create an N+ or an N−region as required by the design and particular application.

To prevent doping of the cathode 120 and the remaining portion of thelink 124, a first mask 126 is formed over the cathode 120 and a portionof the link 124 to protect those areas from becoming doped. The firstmask 126 is preferably a photoresist material or other polymer that iscommonly used in the art. The first mask 126 may be removed afterperforming the n-type doping.

Referring now to FIGS. 4 a-4 b, the cathode 120 and the remainingportion of the link 124 are doped with a p-type dopant. Similar to thedoping of the anode 122 discussed above, a second mask 128, preferably aphotoresist material or other polymer, is formed exposing the cathode120 and the remaining portion of the link 124, and protecting the anode122 and the portion of the link 124 previously doped with n-typeimpurities. In the preferred embodiment the cathode 120 and theremaining portion of the link 124 are doped with a p-type impurity, suchas boron, aluminum, gallium, indium, BF2 or the like, at a dose of about1 E13 to about 5E15 atoms/cm² and at an energy of about 1 to about 20KeV. The doping levels may be altered to create a P+ or a P− region asrequired by the design and particular application. After doping, thesecond mask 128 may be removed. It should be noted that a depletionregion 130 (FIG. 4 b) is formed at the junction of the p-type dopedpolysilicon and the n-type doped polysilicon.

FIGS. 5 a-5 b illustrate wafer 100 of FIGS. 4 a-4 b after a silicidelayer 132 has been formed on the surface of the cathode 120, the anode122, and the link 124. FIG. 5 a is a plan view, and FIG. 5 b is a crosssection view along the axis illustrated in FIG. 5 a. Preferably, thesilicide layer 132 is formed by depositing a metal layer and performingan anneal. Metals that may be used include titanium, cobalt, nickel, andplatinum, forming a silicide layer 132 comprising titanium silicide,cobalt silicide, nickel silicide, or platinum silicide, respectively.Other materials may be used. In the preferred embodiment, the silicidelayer covers the entire surface of the electrical fuse as illustrated inFIGS. 5 a-5 b.

A schematic equivalent to the fuse, prior to programming, formed by theprocess discussed above is shown in FIG. 6. The link 124 is representedby a p-n junction diode 610 and a resistor 612. The p-n junction diode610 is the p-n junction formed in the doped polysilicon, and theresistor 612 is the silicide layer on the surface of the polysilicon.Assuming the convention that current flows from positive to negative,the p-n junction diode 610 normally allows current to flow from thecathode 120 (p-type doped) to the anode 122 (n-type doped). Aprogramming transistor 614 allows the transistor to be programmed (e.g.,blown).

To blow the fuse, a reverse bias is applied to the p-n junction diode610. Because the p-n junction diode 610 restricts current from flowingthrough the polysilicon, the current is restricted to flowing throughthe resistor 612, i.e., the silicide layer 132 of FIG. 5 b. Currentcrowding in the resistor causes silicide depletion to occur in thesilicide layer 132, thereby blowing the fuse or causing the fuse to goto a high-resistance state. FIG. 7 illustrates the schematic diagram ofFIG. 6 after the fuse has been blown.

FIG. 8 is a plan view of an electrical fuse having a plurality of links214, each link having a p-n junction diode, in accordance with anotherembodiment of the present invention. FIG. 9 is a schematic correspondingto the electrical fuse of FIG. 8. As illustrated in FIG. 8, theplurality of links 214 are formed between a cathode 210 and an anode212. The multi-link electrical fuse of FIG. 8 may be fabricated usingthe process steps discussed above with reference to FIGS. 1 a-5 b.

The plurality of links 214 provide redundant links in the event one ormore links are faulty due to process variations. For example, variationsin the silicide process may cause the silicide layer on the links to beincomplete, possibly creating a high resistance. In this situation, someof the links may appear to be blown prior to programming. By havingmultiple links 214, one or more faulty links will not cause the fuse toappear blown if there are good links remaining.

Programming of the multi-link electrical fuse may be performed in thesame manner as the single-link electrical fuse. After programming, thesilicide layers over the p-n junctions are depleted, thereby creating ahigh resistance between the cathode 210 and anode 212.

In yet another embodiment illustrated in FIG. 10, an electrical fusehaving a link 314 with a plurality of p-n junction diodes is provided.FIG. 11 is a schematic corresponding to the electrical fuse illustratedin FIG. 10. In this situation, the link 314 is formed between a cathode310 and an anode 312 similar to the embodiment discussed above, butmultiple p-n junctions are formed in the link 314. Multiple p-n junctiondiodes enhance the programming efficiency.

Yet another embodiment is illustrated in FIGS. 12 and 13, wherein anelectrical fuse having a plurality of links 414 between a cathode 410and an anode 412 is provided, wherein each link has a plurality of p-njunction diodes. This embodiment combines the advantages of themulti-link embodiment and the multiple p-n junction diode embodiment.Accordingly, this embodiment provides for link redundancy by having aplurality of links and increased programming efficiency from formingmultiple p-n junction diodes on each link.

FIG. 14 is a plan view of an anode/cathode 510 illustrating a contactlayout in accordance with one embodiment of the present invention.Generally, contacts 520 are formed in an interlayer dielectric (notshown) to provide an electrical connection between the anode/cathode 510and a metal layer (not shown). Preferably, the anode/cathode 510 has aplurality of contacts 520, such as the contact array illustrated in FIG.14 to reduce the contribution of contact Rc to the total resistance ofthe fuse link.

Although the present invention and its advantages have been described indetail, it should be understood that various changes, substitutions, andalterations can be made herein without departing from the spirit andscope of the invention as defined by the appended claims. For example,the materials and processes used to form the electrical fuses disclosedherein may be altered, as well as the shapes and configurations.

Moreover, the scope of the present application is not intended to belimited to the particular embodiments of the process, machine,manufacture, composition of matter, means, methods and steps describedin the specification. As one of ordinary skill in the art will readilyappreciate from the disclosure of the present invention, processes,machines, manufacture, compositions of matter, means, methods, or steps,presently existing or later to be developed, that perform substantiallythe same function or achieve substantially the same result as thecorresponding embodiments described herein may be utilized according tothe present invention. Accordingly, the appended claims are intended toinclude within their scope such processes, machines, manufacture,compositions of matter, means, methods, or steps.

1. An electrical fuse comprising: a cathode doped with a first impurityof a first conductivity type; an anode doped with a second impurity of asecond conductivity type; a plurality of links electrically coupling thecathode and the anode, each link having a first portion and a secondportion, the first portion being doped with the first impurity, thesecond portion being doped with the second impurity, one or more p-njunction diodes being formed at a junction between the first portion andthe second portion; and a conductive layer over the p-n junction diodes.2. The electrical fuse of claim 1, wherein the first impurity is ap-type impurity and the second impurity is an n-type impurity.
 3. Theelectrical fuse of claim 1, wherein the conductive layer is a silicide.4. The electrical fuse of claim 1, wherein the conductive layer is lessthan 500 Å in thickness.
 5. The electrical fuse of claim 1, wherein theconductive layer is a material selected from the group consistingessentially of titanium silicide, cobalt silicide, nickel silicide,platinum silicide, and a combination thereof.
 6. The electrical fuse ofclaim 1, wherein the cathode, the anode, and the links comprisepolysilicon.
 7. The electrical fuse of claim 1, wherein the cathode, theanode, and the links are less than 2500 Å in thickness.
 8. Theelectrical fuse of claim 1, further comprising one or more contactselectrically coupled to the cathode and one or more contactselectrically coupled to the anode.
 9. The electrical fuse of claim 1,further comprising a first contact array comprising a plurality ofcontacts electrically coupled to the cathode, and further comprising asecond contact array comprising a plurality of contacts electricallycoupled to the anode.
 10. The electrical fuse of claim 1, wherein thecathode and the anode are symmetric. 11-20. (canceled)